The invention relates to a special integrated module, namely an improvement of the IC defined in an IC for timed drive of a display matrix. The previously known module has the designation HD44100 and is supplied by Hitachi, this known IC serving primarily as a drive of an LCD display.
FIG. 1 serves to explain this prior art. A microprocessor .mu.P calculates, for example, the current speed and the current and the average petrol consumption of a motor vehicle. These values are to be displayed on the LCD display matrix LCD by means of a chain of drives 44100/1 . . . 44100/n.
The drives 44100/1 . . . 44100/n each have an identical structure, compared with one another, inter alia one shift register each, the input and output of which are led out to pins of these drives 44100. These shift registers of n drives 44100/1 . . . 44100/n are each connected in series to one another, the corresponding pins which are connected to the inputs and outputs of these shift registers being connected to one another. If the large number of bits of the column signals S which relate to the text and are successively input by the module 44780 pass through these shift registers, finally all the shift registers of the drives 44100/1 . . . 44100/n are each loaded with those column signals S which the drives 44100/1 . . . 44100/n are intended to pass on via their drive units to the display matrix LCD.
The microprocessor .mu.P controls the display and, for this purpose, supplies short codes to an intermediately connected special module 44780, which codes only correspond to the meaning of the characters to be displayed to a greater or lesser extent. This special module can, for example, be the integrated module HD44780 manufactured by Hitachi which contains inter alia a character generator which itself generates from the short codes drive signals which are more concretely detailed and are intended to be supplied to the lines and columns of the display matrix LCD.
The character generator of this known module HD44780 contains inter alia an ROM. It can store the required column signals of characters and character combinations. For the display of a relatively long text on the display matrix, the microprocessor .mu.P must supply here a separate 8-bit code more or less per character; however this 8-bit code supplied by the microprocessor .mu.P is in each case still very short compared with the length of the complete bit pattern formed by the column signals of an individual character.
If the characters to be displayed contain, for example, in each case 40 pixels in 8 lines and 5 columns, 8.times.5 column signals S are required per character because in each case 5 column signals S are to be provided simultaneously per activated line. Therefore, the ROM of the character generator must store 40 line signals per 8.times.5 characters, which line signals are to be supplied to the drives 44100/1 . . . 44100/n in 8 series of 5 bits each.
An 8-bit code of the microprocessor .mu.P can therefore successively call up out of the ROM of the character generator of the module HD44780 in each case 8 series of 5 column signals S which are fed by the module HD44780 (serially) into the input of the shift register of the first IC of the chain 44100/1 . . . 44100/n (it is indicated in FIG. 1 that the module HD44780 can additionally supply itself up to 40 columns Sz of the display matrix from its character generator, but is no longer taken into account here). The total number of column signals S which are to be generated by the module 44780 in order to display once (!) a relatively long text composed of, for example, 40 characters made up of in each case 8 lines and 5 columns by means of the drives 44100/1 . . . 44100/n is therefore no less than 8 series of 40.times.5 bits, that is to say considerably more bits (namely 1600 bits) than the total number of bits in those, in this case, approximately 40 8-bit codes which have to be supplied by the microprocessor .mu.P to the module 44780 in order to control this display (200 bits).
This module 44780 therefore supplies for a single (!) display of this text 8 bits for the line signals Z which it feeds directly to the lines of the display matrix LCD together for all the characters to be displayed. In addition, for this purpose, it supplies the large number, namely 1600, of special column signals S, also generated by its character generator, in serial form to the input of the first of the n different drives 44100/1 . . . 44100/n which themselves pass on these column signals S by means of drivers, as a result with corresponding levels, to the columns of the display matrix LCD.
However, if the display matrix LCD is an LCD display, it is known that the 8 line signals Z and those 1600 column signals S are to be supplied to the display matrix LCD quickly repeated cyclically and continuously--instead of once--in order to obtain a display with a visually stationary appearance. Correspondingly, in this state of the art the module 44780 for this display must deliver its 8 character signals Z very frequently per second, and above all must deliver with the same frequency its respective 1600 column signals S. The maximum length of the drives 44100/1 . . . 44100/n is thus upwardly limited because the pulse repetition rate at which the column signals S have to be entered continuously into the relevant input of the first drive 44100/1 for a display cannot be increased to any desired extent. The length of the text which can be displayed with an adequately still presentation pattern is therefore severely limited in this state of the art. Moreover, the microprocessor .mu.P and the module 44780 are then also highly loaded because both emit and have to process a large number of bits per second in order to maintain the still presentation pattern.
Each of these known drives 44100/1 . . . 44100/n is therefore an IC which serves as timed drive of a display matrix LCD, it also being the intention that this display matrix LCD will be able to display a long, multi-place text composed of letters, figures and/or other characters. The display matrix LCD contains columns and lines and thus at least two dimensions, and in fact it contains many more columns than lines in order also to be able to display the long, frequently only single-line text. The ICs 44100 of identical construction in each case therefore form a chain and supply column signals S for controlling the columns of the display matrix LCD, specifically each IC being intended to control in each case only some of those columns. Every IC 44100 contains a shift register into which bits are shifted which themselves--even in this state of the art--correspond to the text to be displayed on the display matrix, or at least to a section of this text. The input and the output of the shift register is connected directly--or at most via an isolating switch and/or driver stages which do not change the bit pattern--to pins of the IC in order, when required, to be able to shift the bits, under the control of the clock, successively through the chain--namely firstly through the shift register of the first IC of the chain, then through the shift register of the second IC of the chain and then, if present, through the shift registers of the further ICs.
The IC can be controlled during operation by a control processor .mu.P which calculates for example driving speeds and/or other values to be displayed, this control processor .mu.P supplying--in this state of the art only indirectly, for example via the intermediately connected module HD44780--the bits with which the shift registers of the chain are loaded.
There are further known drives for display matrices--even those which are used for driving the columns when the texts to be displayed are often very long and thus the number of columns to be driven is quite considerably greater than the number of column signal outputs of the relevant display modules. Thus, there is for example the module .mu.PD7228 which is supplied by NEC. This IC has a character generator which in the IC converts short codes which are supplied by a microprocessor into the concrete column signals of the relevant columns. However, in this IC each individual drive is to be supplied in each case by the microprocessor via separate lines with the short codes relating to this IC, because these ICs do not have any shift register which has to be switched and operated as in the drive HD4100. There is no provision in the drive .mu.PD7228 for these codes to be passed on, or for the ultimate column signals S to be passed on from IC to IC, although said module serves for controlling in each case only some of the columns. Therefore, if a very long text is to be displayed by means of this IC .mu.PD7228, in fact a multiplicity of such ICs is used of which, however, each controls only some of the columns of the display matrix. Therefore, the microprocessor itself has to successively supply the different ICs with the relevant codes via separate control lines in each case.
In the publication E.D.N. (Electrical Design News) 30 (8 Aug. 1985) No. 18, Newton, Mass./USA, pages 83 to 88, drives SED1503 are also described which do not have a shift register which would permit such drives to be connected in chains by directly connecting the shift registers of these drives in series. A plurality of such drives SED1503 are connected in series and together supply control signals to an LCD display. Each of these drives SED1503 is supplied directly by a microprocessor .mu.C with the corresponding codes. Due to the lack of correspondingly connected internal shift registers of these drives, it is actually not sufficient here for the microprocessor .mu.C only to supply the first drive SED1503 of this series of drives with input signals because in fact the other drives of this series cannot be supplied directly by the output of a preceding drive of this series. Therefore, a chain connection is not possible with these drives SED1503.
However, lengthening a chain of such drives with the low expenditure in terms of wiring between the microprocessor and the drives as aimed at with the invention is then also not possible.
If the display matrix is to be subsequently lengthened--by lengthening the IC chain by means of further drives--for example by the number of column signal outputs of two ICs, for the aforesaid reasons the chain can be lengthened without many problems up to 80 characters of 5 columns only in the first example, namely in the case of the drive HD44100. However, in the case of the module .mu.PD7228 and also in the case of the module SED1503 additional wiring measures must be taken to ensure that each of these drives is supplied with all the necessary data via separate lines.
In the case of drives of the type of the HD44100 module which can be switched in series, because of the omission of corresponding additional data lines or drive lines and the instructions connected therewith, the expenditure is in any case in comparison particularly low--especially if a very long display matrix is to be used. The intermediately connected module, for example HD44780, only has to supply its output signals, namely the column signals S, to the input of the shift register of the first IC of the chain.
As already explained, the invention is also based on an IC drive which, like the HD44100 module, can be connected together to form a chain in such a way that only the first IC of this chain has to be supplied directly with the bits corresponding to the text.
However, on the other hand, the invention still performs the following additional tasks:
The expenditure in terms of drive and in terms of time to supply the relevant shift register of the first IC of the chain with the data bits corresponding to the text is to be further reduced, in that the relevant first IC is fed from the outside
no longer even with the enormous number of data bits which correspond to the concrete column signals--or which then even constitute continuously cyclically repeated column signals, PA1 but rather instead with only those relatively short codes, as data bits, which themselves only correspond to the meaning of individual characters or of individual character combinations to a greater or lesser extent. PA1 on the one hand to arrange on top of one another a plurality of display matrices displaying on single lines, in order to offer the reader a multi-line text, PA1 but, on the other hand, to control each of these single-line display matrices by means of separate ICs according to the invention.
Therefore, even in the case of an LCD display which is to be supplied with column signals in a rapidly repeating cycle, a microprocessor will have to supply to the input of the first drive (IC1) its bytes or data bits--excluding clock signals--only a single time per text to be displayed, instead of continuously repeatedly in frequent cycles per second.
The intermediate connection of a further module, cf. the module HD44780, which has a separate character generator for generating the column signals to be fed into the ICs, will become unnecessary.
Instead of reducing the expenditure in terms of drive and in terms of time it will be possible for virtually any desired number of ICs according to the invention to be arranged in a chain of thus virtually any desired length in that their relevant shift registers can easily be connected in series in such a way that the relevant data which are entered into the shift register of the first IC are shifted through the shift registers of all the ICs of the chain at least usually without changing their bit pattern.
In addition, the microprocessor is to be further relieved in that only the relevant ROM of a text memory of the first IC of the chain is then to be supplied by the microprocessor with particularly short codes which can be delivered particularly quickly (for example only with a short code of for example 8 bits which marks a long standard text, and possibly also with an associated numerical value code also of for example 8 bits), after which the output of the relevant ROM does, for its part, in fact emit relatively long codes, but ones which compared with the number of column signals are still always extremely short and which only correspond symbolically to a greater or lesser extent to an individual character or short character groups, these codes emitted by the relevant ROM of the first IC of the chain being shifted via the shift registers, connected in series, of the ICs, subsequently locally converted in the character generators of the individual ICs and emitted as concrete column signals to the display matrix.
This very complex task, which is per se new, is achieved by means of an IC apparatus for providing a timed drive of a display matrix comprising the display matrix being for displaying a multi-place text composed of letters, figures and/or other characters, the display matrix having very many more columns than lines in order to display an at least 1-line text, a plurality of identically structured ICs that form a chain of such ICs, that supply column signals for controlling the columns of the display matrix, specifically each IC controlling only some of the columns, each IC having a shift register into which bits are shifted which correspond to text to be displayed on the display matrix, or at least to a section of this text, an input and an output of the shift register being connected directly, or at most via an isolating switch and/or driver stages, to input and output pins of the IC in order, when required, to be able to shift the bits, under the control of a clock successively through the chain, namely through the shift register of a first IC of the chain, then through the shift register of a second IC of the chain and then, if present, through the shift registers of further ICs, and being controllable during operation by a control processor, which calculates driving speeds and/or other values to be displayed, each IC having a character generator connected downstream of the shift register, the character generator having a separate memory unit, and during operation, the character generator converting into output signals at least some of the bits, which correspond to only a short code for the contents of relevant characters, by means of the memory unit which is addressed by these bits, said output signals corresponding to IC output signals, and during operation, these IC output signals being first fed as column signals to the column inputs of the display matrix which are respectively assigned to this IC, each IC containing a read-only memory, which stores the bits which are required for the different displays and which are to be loaded into the shift registers of further IC/ICs and which transmits the relevant bits to the shift register of this IC when a relevant address or start address is called up, during operation only the read-only memory of the first IC of the chain, but not the read-only memory of the next, further IC/ICs of the chain, transmitting to the separate shift register of this first IC bits to the shift register of the next, further IC, and during operation the shift register or registers of the further IC/ICs of the chain being loaded by the shift register of the respective preceding IC of the chain.
Therefore, in the invention the enormous number of bits which correspond to the column signals S are no longer entered into the input of the first shift register of the chain of ICs but rather only the bits of short codes which in terms of contents approximately correspond to the meaning of the characters to be displayed. The combinations of column signals associated with the character are only generated according to the invention in the relevant ICs--in each case by means of the character generator mounted there in each case.
In a special further development of the invention, the microprocessor is relieved still considerably further, even if it is to display a very long standard text. In this further development, the codes which are supplied by the microprocessor to the relevant first IC of the chain can often only be formed by a short address.
In the invention, the length of the chain can be lengthened virtually to any desired degree, that is to say the number of ICs which can be connected in series can be increased to virtually any desired degree. Thus, even very long texts can be displayed by the invention without difficulty even if only relatively few bits are fed as a short code by the microprocessor only to the first of these ICs, and in fact to the input of its shift register. In this case, in the invention this microprocessor can generally supply its data bits directly to the relevant data input of the first IC of the chain without a further module which contains a separate character generator having to be intermediately connected--cf. the module 44780 in FIG. 1. Because according to the invention only relatively short codes have to be stored in the shift registers, it will also be possible to load the shift register of the last IC of this chain in each case comparatively quickly with its codes so that by virtue of the invention the expenditure in terms of time for preparing the display of a new long text is also particularly short.
The text indicated by the ICs according to the invention is in fact generally only one line long in order to reduce the number of different characters which have to be stored in preprogrammed form in the character generator. If the text to be displayed is multi-lined, it is often recommended for the same reason
The IC according to the invention does not show all its advantages until a plurality of such ICs are to be connected together to form a chain. However, the IC according to the invention can also be used when only a single IC according to the invention is used to display a text which is then always relatively short.
The measures disclosed below permit additional advantages to be obtained.
The first IC of the chain can also control lines of the display matrix, specifically jointly for all the ICs of the chain by also feeding line signals to the display matrix. This permits a separate module for controlling the lines of the display matrix to be dispensed with.
For each IC, a latch register which can buffer the contents of the shift register is connected downstream between the shift register and the character generator. This permits unsteady flickering of the displays during the preparation of a text to be newly displayed to be avoided.
On each IC, the column signals are fed to relevant IC pins via an output register connected downstream of the character generator. This permits a parallel-to-serial conversion of the bits supplied by the character generator.
The output register is formed by series connection of an output shift register and an output latch register. This permits a particularly operationally reliable, sturdy construction of the output register to be used, in which case, moreover, the corresponding output latch register itself additionally reduces the flickering of the text considerably during a change of the text to be displayed.
When the present invention is a drive for a liquid crystal display matrix, the output register and/or associated output driver stages transmit column signals consisting of more than two voltage levels, as well as, a line output register and/or associated driver stages. This permits the invention to be used for controlling display matrices if the column signals and/or line signals are always no longer to consist in a purely binary manner of just two levels but also at least some of them are to have other levels at certain times, as is often customary for example for an LCD display as a display matrix.